ASM1130 CROSS ASSEMBLER V1.22 -- V2M12 -- Sun Nov 1 19:25:07 2020
Source File: \s1ediv.asm
1 | *************************************************** S1C00010
2 | * * S1C00020
3 | * SUBROUTINE NAME * S1C00030
4 | * FULL NAME- EXTENDED PRECISION FLOATING- * S1C00040
5 | * POINT DIVIDE FUNCTION. * S1C00050
6 | * CODE NAME- EDIV/EDIVX * S1C00060
7 | * PURPOSE- THIS FUNCTION COMPUTES THE QUOTIENT * S1C00070
8 | * OF TWO EXTENDED PRECISION FLOATING-POINT * S1C00080
9 | * NUMBERS. * S1C00090
10 | * METHOD-SEE IBM 1130 SUBROUTINE LIBRARY MANUAL.* S1C00100
11 | * CAPABILITIES AND LIMITATIONS- SEE IBM 1130 * S1C00110
12 | * SUBROUTINE LIBRARY MANUAL. * S1C00120
13 | * SPECIAL FEATURES- N/A * S1C00130
14 | * ADDITIONAL INFORMATION- * S1C00140
15 | * ESTIMATED EXECUTION TIME- SEE IBM 1130 * S1C00150
16 | * SUBROUTINE LIBRARY MANUAL * S1C00160
17 | * * S1C00170
18 | *************************************************** S1C00180
LIBF EDIV -V1.
20 | LIBR S1C00200
21 | EPR S1C00210
22 | ENT EDIV S1C00220
23 | ENT EDIVX S1C00230
0000 6941 24 | EDIVX STX 1 EDX1+1 SAVE XR1 S1C00240
0001 C400 0000 25 | LD L *-* LOADER INSERT. S1C00250
0003 7004 26 | MDX EDC S1C00260
0004 693D 27 | EDIV STX 1 EDX1+1 SAVE XR1. S1C00270
0005 C400 0000 28 | LD L *-* LOADER INSERT. S1C00280
0007 6100 29 | LDX 1 0 NO INDEXING. S1C00290
0008 D003 30 | EDC STO *+3 S1C00300
0009 8041 31 | A ONE+1 =1 SET UP EXIT. S1C00310
000A D039 32 | STO EDX1+3 S1C00320
000B 7580 0000 33 | MDX I1 *-* OPND ADDRESS INTO XR1. S1C00330
000D 1000 34 | NOP IF MDX CAUSES BR,SKIP NOP S1C00340
000E C102 35 | LD 1 2 GET SECOND HALF OF DIVISOR S1C00350
000F 18D0 36 | RTE 16 SHIFT TO EXTENSION S1C00360
0010 C101 37 | LD 1 1 GET FIRST HALF OF DIVISOR S1C00370
0011 4C18 0045R 38 | BSC L DOVL,+- BR IF DIVISOR ZERO S1C00380
0013 D838 39 | STD DVR IF NOT,STORE DIVISOR S1C00390
0014 C37E 40 | LD 3 126 GET FIRST HALF OF DIVIDEND S1C00400
0015 4C18 0041R 41 | BSC L EDX1,+- IF ZERO,BR OUT S1C00410
0017 F101 42 | EOR 1 1 IF NOT,GET QUOTIENT SIGN S1C00420
0018 E037 43 | AND EDCN WIPE OUT ALL BUT SIGN BIT S1C00430
0019 D02E 44 | STO QSGN SAVE SIGN OF QUOTIENT S1C00440
001A 4C28 001FR 45 | BSC L *+3,+Z BR IF SIGN NEG S1C00450
001C CB7E 46 | LDD 3 126 SUBTRACT MAG. OF DIVISOR S1C00460
001D 982E 47 | SD DVR FROM DIVIDEND MAGNITUDE, S1C00470
001E 7002 48 | MDX *+2 TO ENSURE DIVIDEND SMALLER S1C00480
001F CB7E 49 | LDD 3 126 THAN DIVISOR. S1C00490
0020 882B 50 | AD DVR S1C00500
0021 DB7E 51 | STD 3 126 DIVIDEND MINUS DIVISOR S1C00510
0022 4818 52 | BSC +- BRANCH IF ACC NON-ZERO S1C00520
0023 18D0 53 | RTE 16 IF ACC ZERO, FETCH EXT S1C00530
0024 4C20 0029R 54 | BSC L *+3,Z BRANCH IF EXT NON-ZERO S1C00540
0026 C827 55 | LDD DF1 IF ZERO,PUT A PROPERLY S1C00550
0027 E820 56 | OR QSGN SIGNED ONE IN FAC S1C00560
0028 700C 57 | MDX X S1C00570
58 | * S1C00580
59 | *DO COMPUTATION FOR MANTISSA AND EXPONENT S1C00590
60 | * S1C00600
0029 C822 61 | LDD DVR IF NOT ZERO,PERFORM S1C00610
002A 2710*4000 62 | LIBF XDD DIVISION S1C00620
002B F024 63 | EOR EDCN CHANGE THE SIGN S1C00630
002C DB7E 64 | STD 3 126 STORE W/OPPOSITE SIGN S1C00640
002D F01A 65 | EOR QSGN PROPER SIGN ON QUOTIENT S1C00650
002E 4C10 003CR 66 | BSC L CEXP,- BR TO COMPUTE EXPONENT IF S1C00660
0030 F017 67 | EOR QSGN NOT NEG. IF NEG,CHANGE S1C00670
0031 4810 68 | BSC - SIGN. BR IF NOT ZERO. S1C00680
0032 8817 69 | AD ONE IF ZERO,ADD ONE S1C00690
0033 1881 70 | SRT 1 S1C00700
0034 F01B 71 | EOR EDCN RESTORE SIGN S1C00710
0035 DB7E 72 | X STD 3 126 STORE COMPUTED QUOTIENT S1C00720
0036 F011 73 | EOR QSGN GET PROPER SIGN S1C00730
0037 4828 74 | BSC +Z BR IF NOT NEG S1C00740
0038 D37E 75 | STO 3 126 IF NEG,STORE S1C00750
0039 C37D 76 | LD 3 125 OTHERWISE,LEAVE FAC AS IS S1C00760
003A 8010 77 | A ONE+1 INCR EXPONENT BY ONE S1C00770
003B D37D 78 | STO 3 125 S1C00780
003C C37D 79 | CEXP LD 3 125 COMPUTE QUOTIENT EXPONENT. S1C00790
003D 9100 80 | S 1 0 S1C00800
003E 8012 81 | A EDCN+1 =128 S1C00810
003F D37D 82 | STO 3 125 S1C00820
0040 0605*90C0 83 | LIBF FARC CHK S1C00830
0041 6500 0000 84 | EDX1 LDX L1 *-* RESTORE XR1. S1C00840
0043 4C00 0000 85 | BSC L *-* EXIT. S1C00850
0045 C005 86 | DOVL LD ONE+1 TURN ON PROGRAM DIVIDE S1C00860
0046 D37B 87 | STO 3 123 CHECK INDICATOR. S1C00870
0047 70F9 88 | MDX EDX1 S1C00880
89 | * S1C00890
90 | *CONSTANTS AREA S1C00900
91 | * S1C00910
0048 0000 92 | QSGN DC 0 STORE QUOTIENT SIGN S1C00920
004A 0000 0001 93 | ONE DEC 1 EXTENDED PREC ONE S1C00930
004C 0000 0000 94 | DVR DEC 0 DIVISOR BUFFER. S1C00940
004E 4000 0000 95 | DF1 DEC 1.0B1 FLT PT ONE S1C00950
0050 8000 96 | EDCN DC /8000 SIGN BIT MASK S1C00960
0051 0080 97 | DC 128 EXPONENT CON S1C00970
0052 98 | END S1C00980
There were no errors in this assembly
=== CROSS REFERENCES ==========================================================
Name Val Defd Referenced
CEXP 003CR 79 66
DF1 004ER 95 55
DOVL 0045R 86 38
DVR 004CR 94 39 47 50 61
EDC 0008R 30 26
EDCN 0050R 96 43 63 71 81
EDIV 0004R 27
EDIVX 0000R 24
EDX1 0041R 84 24 27 32 41 88
ONE 004AR 93 31 69 77 86
QSGN 0048R 92 44 56 65 67 73
X 0035R 72 57