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cdc:6600.instruction.set

CDC 6000 CPU Instruction Set

Author Mark Riordan
Original Content 60bits.net

This table lists the CPU instructions of a Control Data Corporation 6000 Series computer. It does not list CMU (Compare-and-Move Unit) instructions that briefly appeared on the later Cyber 70 Series. All instructions are either 15 or 30 bits long, and are written in traditional octal.

Instructions which, from my observation, were rarely used are in red. Instructions that were particularly frequently used are in blue.

Octal Mnemonic Description 6500
Cycles
00000PSProgram StopInfinite
01xxkkkkkkRJ KReturn Jump (call subroutine)21
011jKRE Bj+KRead ECS from X0 to A0 for Bj+K words?
012jKWE Bj+KWrite ECS from A0 to X0 for Bj+K words?
013jKXJ Bj+KExchange jump (context switch)?
02ixkkkkkkJP Bi+KJump5/13
030jkkkkkkZR Xj,KJump if zero5/13
031jkkkkkkNZ Xj,KJump if non-zero5/13
032jkkkkkkPL Xj,KJump if positive5/13
033jkkkkkkNG Xj,KJump if negative5/13
034jkkkkkkIR Xj,KJump if In Range (not floating point infinity)5/13
035jkkkkkkOR Xj,KJump if Out of Range (floating point infinity)5/13
036jkkkkkkDF Xj,KJump if Definite (good floating point value)5/13
037jkkkkkkID Xj,KJump if InDefinite (bad floating point value)5/13
04ijkkkkkkEQ Bi,Bj,KJump if Bi=Bj (if i=j, unconditional jump)5/13
05ijkkkkkkNE Bi,Bj,KJump if Bi<>Bj5/13
06ijkkkkkkGE Bi,Bj,KJump if Bi>Bj5/13
07ijkkkkkkLT Bi,Bj,KJump if Biโ‡Bj5/13
10ijxBXi XjMove Xj to Xi5
11ijkBXi Xj*XkXi:=Xj AND Xk5
12ijkBXi Xj+XkXi:=Xj OR Xk5
13ijkBXi Xj-XkXi:=Xj XOR Xk (often used to zero an X reg)5
14ixkBXi -XkXi:=NOT Xk5
15ijkBXi -Xj*XkXi:=(NOT Xj) AND Xk5
16ijkBXi -Xj+XkXi:=(NOT Xj) OR Xk5
17ijkBXi -Xj-XkXi:=(NOT Xj) XOR Xk5
20ivvLXi vvLeft shift Xi vv bits circular6
21ivvAXi vvRight shift Xi vv bits w/ sign extend6
22ijkLXi Bj,XkXi:=Xk left shifted circular Bj bits6
23ijkAXi Bj,XkXi:=Xk right shifted w/ sign extend Bj bits6
24ijkNXi Bj,XkXi:=Xk normalized; Bj:=# bits Xk was shifted6
25ijkZXi Bj,XkXi:=Xk normalized w/ round; Bj:=# bits Xk was shifted6
26ijkUXi Bj,XkXi:=Mantissa of Xk; Bj:=exponent6
27ijkPXi Bj,XkXi:=Xk with exponent Bj6
30ijkFXi Xj+XkXi:=Xj+Xk (floating point)11
31ijkFXi Xj-XkXi:=Xj-Xk (floating point)11
32ijkDXi Xj+XkXi:=Xj+Xk (bottom word, double prec.)11
33ijkDXi Xj-XkXi:=Xj-Xk (bottom word, double prec.)11
34ijkRXi Xj+XkXi:=Xj+Xk (rounded floating point)11
35ijkRXi Xj-XkXi:=Xj-Xk (rounded floating point)11
36ijkIXi Xj+XkXi:=Xj+Xk (60-bit integer)6
37ijkIXi Xj-XkXi:=Xj-Xk (60-bit integer)6
40ijkFXi Xj*XkXi:=Xj*Xk (floating point)57
41ijkRXi Xj*XkXi:=Xj*Xk (rounded floating point)57
42ijkDXi Xj*XkXi:=Xj*Xk (bottom word, double prec., or 48-bit integer)57
43ivvMXi vvXi:=Mask of vv bits at top of word6
44ijkFXi Xj/XkXi:=Xj/Xk (floating point)57
45ijkRXi Xj/XkXi:=Xj/Xk (rounded floating point)57
46000NONo operation3
47ixkCXi XkXi:=# of bits in Xk (population count)68
50ijkkkkkkSAi Aj+KAi:=Aj+K6/12/10
51ijkkkkkkSAi Bj+KAi:=Bj+K6/12/10
52ijkkkkkkSAi Xj+KAi:=Xj+K6/12/10
53ijkSAi Xj+BkAi:=Xj+Bk6/12/10
54ijkSAi Aj+BkAi:=Aj+Bk6/12/10
55ijkSAi Aj-BkAi:=Aj-Bk6/12/10
56ijkSAi Bj+BkAi:=Bj+Bk6/12/10
57ijkSAi Bj-BkAi:=Bj-Bk6/12/10
60ijkkkkkkSBi Aj+KBi:=Aj+K5
61ijkkkkkkSBi Bj+KBi:=Bj+K (SB0 B0+46000 was a common 30-bit noop)5
62ijkkkkkkSBi Xj+KBi:=Xj+K5
63ijkSBi Xj+BkBi:=Xj+Bk5
64ijkSBi Aj+BkBi:=Aj+Bk5
65ijkSBi Aj-BkBi:=Aj-Bk5
66ijkSBi Bj+BkBi:=Bj+Bk5
67ijkSBi Bj-BkBi:=Bj-Bk5
70ijkkkkkkSXi Aj+KXi:=Aj+K (18-bit with sign extend)6
71ijkkkkkkSXi Bj+KXi:=Bj+K (18-bit with sign extend)6
72ijkkkkkkSXi Xj+KXi:=Xj+K (18-bit with sign extend)6
73ijkSXi Xj+BkXi:=Xj+Bk (18-bit with sign extend)6
74ijkSXi Aj+BkXi:=Aj+Bk (18-bit with sign extend)6
75ijkSXi Aj-BkXi:=Aj-Bk (18-bit with sign extend)6
76ijkSXi Bj+BkXi:=Bj+Bk (18-bit with sign extend)6
77ijkSXi Bj-BkXi:=Bj-Bk (18-bit with sign extend)6

Lower-case letters are octal digits, as follows:

x = Don't care
i = Register number
j = Register number
k = Register number if single digit, else part of 18-bit constant (usually used as a CPU memory address)
vv = 6-bit constant

Uppercase K = 18-bit CPU memory address

The 6500 Cycles column describes the speed of the instruction on a CDC 6500. Cycle times are minor cycles, with one minor cycle being 100ns.

Cycle times marked as A/B mean the instruction took A cycles if the condition was false, and B if true. Cycle times marked as A/B/C mean the instruction took A cycles if i=0, B cycles if i=1-5, and C cycles if i=6 or 7.

Adapted from Ralph Grishman's Assembly Language Programming for the Control Data 6000 Series and the Cyber 70 Series. (Don't make the mistake, as I sometimes did, of confusing Ralph Grishman with Ralph Griswold, the creator of the SNOBOL and Icon programming languages.)ร‚ย  Portions from 6000 COMPASS Version 2 Reference Manual, CDC publication number 60279900.

Back to CDC 6500 frameset

cdc/6600.instruction.set.txt ยท Last modified: 2023/09/02 14:09 by Site Administrator